Field of the Invention
The invention relates to a method for producing a semiconductor wafer.
To produce semiconductor chips, semiconductor structures are applied to relatively large silicon wafers which are divided up in a subsequent method step. To subsequently make contact with circuit carriers arranged at a higher level and/or in order for the semiconductor chips to be stacked, they may be provided, for example, with contact surfaces. Thin wire connections or bonded connections are then fixed to the contact surfaces. That connection technique is also known as bonding. Another connection technique consists in creating contact surfaces which are large enough to receive contact bumps. The bumps consist, for example, of a solder paste. During semiconductor chip mounting, these bumps of soldering paste are partially melted as a result of the entire semiconductor chip being heated, with the result that the desired mechanical and electrical connections are produced. That mounting technique can also be referred to as the flip chip technique.
To produce the contact surfaces for the application of these solderable bumps, a metallic layer is applied after the semiconductor wafer has been cleaned. This is followed by coating with a passivation layer, after which an exposure step takes place in order to define the subsequent structures. After metallization of structures which have previously been exposed, further steps are carried out for local removal and etching of the metallization layer. The conductor structures obtained therefrom are then wired to form finished semiconductor modules in a bonding process.
A method for producing semiconductor structures with bumps for the electrical and mechanical connection of semiconductor chips is known, for example, from U.S. Pat. No. 5,851,911. The method is used in particular to produce contact bumps on a semiconductor wafer—which is subsequently to be separated (diced) into individual chips—for making contact by way of a flip chip technique. This involves direct mounting of the semiconductor chip provided with bumps on a printed circuit board. The fixed mechanical and electrical connection is then produced by way of a soldering process, in which the solderable bumps are heated to their melting point and form a form-fitting connection with the contacts on the printed circuit board.
If short-circuit lines or fuses are provided on the wafer, however, these have to be covered beforehand in order to avoid undesirable short-circuits. Fuses of this type are often used in semiconductor arrangements and are used, in the event of individual circuit elements or modules, such as for example memory cells, failing, to connect up corresponding replacement or redundant elements. For example, if a test of a semiconductor memory determines that a word line is defective, a redundant word line is activated instead of the defective word line as a result of fuses being interrupted or triggered. It is also possible, for example, to connect chip options by means of fuses. The separation can be effected, for example, by means of laser beam (a so-called laser fuse) or by electrical destruction resulting from the evolution of heat (what is known as an electrical or E fuse). Semiconductor arrangements of that type and methods for producing them are described in the commonly assigned published patent applications U.S. 2002/0084508 A1 (corresponding German patent DE 199 26 107 C1) and U.S. 2002/0022373 A1 (corresponding German patent DE 100 21 098 C1).